Elenco MicroMaster ® Computer Training Kit Instrukcja Użytkownika Pobierz pdf (Strona 74)

8-19

8085A INSTRUCTION SET SUMMARY (Cont’d)

Instruction Code (1)

Mnemonic Description D

INCREMENT AND DECREMENT (cont’d)

DCX B Decrement B & C 00001011

DCX D Decrement D & E 00011011

DCX H Decrement H & L 00101011

ADD

ADD r Add register to A 10000SSS

ADC r Add register to A with carry 10001SSS

ADD M Add memory to A 10000110

ADC M Add memory to A with carry 10001110

ADI Add immediate to A 11000110

ACI Add immediate to A with carry 11001110

DAD B Add B & C to H & L 00001001

DAD D Add D & E to H & L 00011001

DAD H Add H & L to H & L 00101001

DAD SP Add stack pointer to H & L 00111001

SUBTRACT

SUB r Subtract register from A 10010SSS

SBB r Subtract register from A with borrow 10011SSS

SUB M Subtract memory from A 10010110

SBB M Subtract memory from A with borrow 10011110

SUI Subtract immediate from A 11010110

SBI Subtract immediate from A with borrow 11011110

LOGICAL

ANA r And register with A 10100SSS

XRA r Exclusive OR register with A 10101SSS

ORA r OR register with A 10110SSS

CMP r Compare register with A 10111SSS

ANA M And memory with A 10100110

XRA M Exclusive OR memory with A 10101110

ORA M OR memory with A 10110110

CMP M Compare memory with A 10111110

ANI And immediate with A 11100110

XRI Exclusive OR immediate with A 11101110

ORI OR immediate with A 11110110

CPI Compare immediate with A 11111110

ROTATE

RLC Rotate A left 00000111

RRC Rotate A right 00001111

RAL Rotate A left through carry 00010111

RAR Rotate A right through carry 00011111

SPECIALS

CMA Complement A 00101111

STC Set carry 00110111

CMC Complement carry 00111111

DAA Decimal adjust A 00100111

CONTROL

EI Enable interrupts 11111011

DI Disable interrupt 11110011

NOP No-operation 00000000

HLT Halt 01110110

NEW 8085A INSTRUCTIONS

RIM Read Interrupt Mask 00100000

SIM Set Interrupt Mask 00110000

NOTES: 1 - DDS or SSS B 000, C 001, D 010, E011, H 100, L 101, Memory 110, A 111

2 - Two possible cycle times. (6/12) indicate instruction cycles dependent on condition flags.

1 2 ... 69 70 71 72 73 74 75 76 77 78 79 ... 115 116

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